Kioxia and Western Digital today announced the development of sixth generation 162-layer 3D NAND flash technology. Its creation is called “the next milestone in a 20-year partnership.”
The 6th generation flash memory features an advanced architecture that provides 10% more horizontal cell density than the 5th generation technology. Combined with 162 levels in the vertical direction, this reduced the die area for the same information capacity by 40% compared to 112-layer memory, which led to “cost optimization”.
The developers also applied the placement of the logic circuit under the array of cells and working with four areas at the same time, which together provided an increase in write performance by almost 2.4 times and a decrease in read latency by 10% compared to the previous generation. I / O performance improved by 66%.
Overall, the new flash memory technology reduces cost per bit and increases storage capacity per wafer by 70% over the previous generation.
When the serial production of the new memory begins, the partners do not specify.
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